KEYNOTE SPEAKERS (Tentative lists)
Dr. Yasumitsu Orii
Senior Managing Executive Officer, Rapidus Corporation, Japan
"Semiconductor Packaging Revolution in the Era of Chiplets"
Abstract: Since the semiconductor cost for state-of-the-art nodes is increasing, “Chiplet” technology is in the spotlight as a new evolutionary path to scale up integration and improve performance and reduce the total cost. With an SoC, a chip might incorporate a CPU, plus an additional several IP blocks on the same chip. That design is then scaled by the advanced node, which is an expensive process. With a chiplet model, those several IP blocks are hardened into smaller dies(chiplets) and those dies are integrated on an interposer to build a system. Those chips must be connected in the shortest length while considering signal integrity and power integrity so that the cutting-edge packaging technology is the key to improve the performance of IT equipment. In this presentation, the advanced 2.1D, 2.3D, 2.5D and 3D packaging technologies will be introduced as well as the several interposer technologies.
Dr. Christophe Maleville
Senior Vice President, Soitec’s Digital Electronics Business Unit, France
"Efficient integrated devices are growing on Engineered Substrates"
Abstract: AI and 5G are transformative megatrends. AI harnesses machine learning for smart decision-making and automation. 5G, a new wireless standard, offers ultra-fast speeds and low latency. Together, they revolutionize industries, enabling advanced applications like autonomous vehicles, remote surgery, and immersive experiences, shaping the future of technology. RFSOI (Radio Frequency Silicon on Insulator) engineered substrate has now totally demonstrated that PPAC optimization can start with substrate and leveraging materials properties. RFSOI enhances radio frequency performance by reducing signal loss and interference. Its insulated layer isolates components, improving energy efficiency and allowing faster data transfer in wireless devices like smartphones and IoT applications. RFSOI is now powering 100% of Smartphones FEM for 4G and its performance is now extended to support 5G spectrum. FD-SOI (Fully Depleted Silicon on Insulator) engineered substrate is a semiconductor material crucial for efficient integrated circuits. It offers better power performance and energy efficiency by utilizing a thin layer of silicon (channel of transistor) on top of an insulating layer. This enables advanced mobile processors and IoT devices, conserving energy and extending battery life. FDSOI now demonstrates not only being perfect platform for edge AI applications but also becoming the standard for 5G transceivers. Photonic-SOI (Silicon on Insulator) engineered substrate combines thicker silicon layer and oxide layer for photonic components for AI applications. It enables faster data transmission using light instead of electricity, enhancing processing speed and energy efficiency. This technology finds use in AI systems for rapid information exchange, improving performance in neural networks and data-intensive tasks. New materials such as III-V compounds and piezoelectric materials are now integrated on the best underlying substrate to further push the limits and performance for processing speed, lowering power consumption and enable new functionalities, for example in filter applications. Engineered substrates are now mature and large volume substrates offering advanced performance to serve megatrends.
Dr. Vincent Huard
Dolphin Design, France
"Embracing the new era of AI at the edge"
Abstract: In the era of AI at the edge, running on-device inference poses unique challenges for both the Audio/Speech and Computer Vision market segments. In this presentation, we will delve into these challenges and explore the solutions offered by Dolphin Design IP platforms. We will introduce the IP value proposal, highlighting the implementation details and performance benchmarks. Additionally, we will touch upon the emerging trend of on-device Large Language Models (LLMs), opening up new possibilities for edge computing. Join us as we embrace the new era of AI at the edge and discover the transformative potential of on-device intelligence.
Dr. Takahiro Mori
National Institute of Advanced Industrial Science and Technology (AIST), Japan
"Silicon technologies for quantum computing"
Abstract: LSI technology has continuously supported the progress of computer performance. Today, transistor miniaturization almost reaches its limitation; however, efforts of semiconductor society have realized a continuous increment of the number of transistors per unit area, thanks to the development of new technologies. Also, new device- and circuit-level technologies have come to continue the trend of low power consumption. There is no doubt that the transistor and its integrated circuit technologies continue to be the driving force for the progress of computer performance. However, the speed of the progress has slowed down. There has been a demand to seek a new driving force in recent years. Then, quantum computing technology has been quite attractive and promising for the future. The most promising applications of quantum computers are combinatorial optimization problems with social significance in many cases and quantum chemical calculation, which accounts for much of modern supercomputer usage. Today, quantum computers have been realized. We can use quantum computers; however, certainly, their performance is not satisfactory. This is because the number of qubits we can use is still insufficient. Toward realizing their full potential, we must succeed in the integration of million-scale qubits. Therefore, the integration technology for quantum computers is now on focus. Silicon quantum computers are attractive from this point of view. Needless to say, silicon technology can achieve large-scale integration of small devices. Recently, companies that have supported the semiconductor industry, such as Intel and Global Foundries, have participated in quantum technology R&D.; For example, Intel has demonstrated the operation of their silicon qubits fabricated in their mass-production-ready fabrication line using 300mm-scale wafers. This presentation summarizes the issues toward large-scale integration of silicon qubits and introduces our recent significant research results.
Prof. Ryosho Nakane
The University of Tokyo, Japan
"Physical reservoir computing toward edge AI hardware"
Abstract: Recently, machine-learning based electronics for data driven computing, so-called “AI electronics”, has been greatly progressed to continuously bring about positive impacts on society and way of life. This movement was triggered by the great success in the computing algorithm with deep neural networks on software, thanks to rapid progress of versatile hardware technology, such as CMOS circuits and GPU accelerators. After a little while, various hardware technologies specialized for AI electronics, such as neuromorphic chip and computing in memory (CiM), have emerged to achieve high-performance, low-latency, and energy-efficient computing, and nowadays it pioneers a new field in electronics. The most of such technologies focus on the synaptic function, i.e., the weighted sum of many neuron output values (the function is sometimes referred as to Multiply Accumulate: MAC) and thresholding with a preset value, because it is one of the bottlenecks when algorithms with large-scaled neural networks are properly realized. Nevertheless, even when energy-efficient computing is further advanced in this direction, a massive number of neurons and synapse, complicated circuits, computing algorithm with time-varying sequential processing, and iterative learning algorithm are still issues for edge AI hardware onto terminal devices where computational resources, such as power supply and memory storage, are severely limited. Physical reservoir computing (RC) developed from recurrent neural networks has high potential to revolve technologies for edge AI hardware by overcoming those issues with a novel route, and a major advantage lies in its high applicability to temporal information processing of time-series data that are frequently detected by various sensors. The computing system utilizes nonlinear physical dynamics without adjustable weights, called “reservoir”, and a one-layer linear classifier with a small number of adjustable weights. Those features enable the uses of a feasible reservoir device and a deterministic learning algorithm with a linear regression, such as Ridge regression. Owing to a small number of hyper parameters (adjustable weights), physical RC can demonstrate high-performance, low-latency, and energy-efficient computing for a specific task, while leveraging nonlinear physical dynamics. The presentation reviews physical RC with emphasis on electronics: the basics including the historical background and computing scheme, recent advances with various electronic devices, such as analog circuits, memristors, ferroelectric devices, and spintronic devices, and current issues and perspective for edge AI hardware.
Mr. Xiaomin Li
Founder and Managing Director of WinTech Nano-Technolog Services, Singapore
"Necessary but non-core laboratory analytical works drives semiconductor industry into a new norm: Labless solution "
Abstract: With semiconductor industry continuous pushing the boundaries of Moore's Law, driving for smaller and more efficient process nodes, heterogeneous integration, better power efficiency, enhanced data processing capabilities, the demand of reliability assessment of IC chip from design to manufacturing, packaging assembly to field application becomes higher and higher. With the inhouse laboratory setup, semiconductor companies inevitably face challenges to balance between cost and resource effectiveness and long term sustainability of analytical technology advancement, as they belong to necessary but non-core work. Under normal circumstance, technology iterations in advanced analytical instrument, glass ceiling of lab analysis experts etc are the common factors that hinter semiconductor companies to engage with the most advanced analytical techniques. Thus, Labless concept, created by Mr. Li Xiaomin, started to be well received by the industry and gradually become an industrial norm in the emerging market like China. The 3rd party analytical service providers, due to their neutrality, technical specialties in analytical work, continuously engagement with advanced equipment, fast turnaround time, could enable the Labless model for the industry to outsource those necessary but non-core analytical works.